課程名稱 |
系統晶片驗證 Soc Verification |
開課學期 |
101-2 |
授課對象 |
電機資訊學院 電機工程學研究所 |
授課教師 |
黃鐘揚 |
課號 |
EEE5023 |
課程識別碼 |
943 U0250 |
班次 |
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學分 |
3 |
全/半年 |
半年 |
必/選修 |
選修 |
上課時間 |
星期五2,3,4(9:10~12:10) |
上課地點 |
電二104 |
備註 |
總人數上限:50人 |
Ceiba 課程網頁 |
http://ceiba.ntu.edu.tw/1012socv |
課程簡介影片 |
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核心能力關聯 |
核心能力與課程規劃關聯圖 |
課程大綱
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為確保您我的權利,請尊重智慧財產權及不得非法影印
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課程概述 |
1.Verification problems in SoC Designs.
2.Block, system, vs. SoC Verification.
3.Simulation-based verification. Testbench Authoring.
4.Assertion-based verification (ABV). Property specification language.
5.Simulation speed-up by emulation. Prototyping verification.
6.Formal verification techniques. Automatic test pattern generation (ATPG). Boolean Satisfiability (SAT). Binary Decision Diagram (BDD).
7.Semi-Formal verification.
8.Equivalence checking. Property checking.
9.Future SoC verification challenges and directions.
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課程目標 |
. |
課程要求 |
1.Homework 30%
2.Mid-term exam 30%
3.Final exam or project 40%
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預期每週課後學習時數 |
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Office Hours |
另約時間 備註: Please send me an e-mail (ric@cc.ee.ntu.edu.tw) for appointment. |
指定閱讀 |
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參考書目 |
Textbook: 1.“System-on-a-Chip Verification - Methodology and Techniques”, Prakash Rashinkar, Peter Paterson, and Leena Singh, Kluwer Academic Publishers.
2.“Assertion-Based Design”, Harry Foster, Adam Krolnik, and David Lacey, Kluwer Academic Publishers.
3.“Writing Testbenches: Functional Verification of HDL Models”, Janick Bergeron, Kluwer Academic Publishers.
4.Class handouts/slides.
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評量方式 (僅供參考) |
No. |
項目 |
百分比 |
說明 |
1. |
Homework |
20% |
3 assignments |
2. |
Programming Assignments |
25% |
3 assignments |
3. |
Final Exam |
25% |
Held in the DAC week (06/07) |
4. |
Final Project |
30% |
Due on 06/25 (Tue) |
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週次 |
日期 |
單元主題 |
第1週 |
2/22 |
* Class Introduction<br>
* Introduction to Verification |
第2週 |
3/01 |
* Overview of Modern formal techniques<br>
[PA#1] Getting Familiar with V3 |
第3週 |
3/08 |
* Formal Modeling and Formal Property Specification |
第4週 |
3/15 |
* Introduction to BDD<br>
[HW#1] BDD |
第5週 |
3/22 |
* Advanced BDD Techniques |
第6週 |
3/29 |
* BDD-Based Verification<br>
[PA#2] BDD-Based Verification |
第7週 |
4/05 |
Spring Break (No class) |
第8週 |
4/12 |
* Introduction to SAT |
第9週 |
4/19 |
* Advanced SAT Techniques<br>
[HW#2] SAT |
第10週 |
4/26 |
* Bounded Model Checking |
第11週 |
5/03 |
* Unbounded Model Checking<br>
[PA#3] SAT-Based Verification |
第12週 |
5/10 |
* Property Directed Reachability |
第13週 |
5/17 |
* Applications of SAT on Logic Synthesis<br>
(Final Project Proposal Due) |
第14週 |
5/24 |
* From Satisfiability to Optimization<br>
[HW#3] SAT Applications |
第15週 |
5/31 |
* System Level Design and Verification |
第16週 |
6/07 |
Final Exam (DAC Week) |
第17週 |
6/14 |
* Advanced Topics (Liveness Property Checking, Satisfiability Modulo Theories) |
第18週 |
06/21 |
Final Project Preparation (No class) |
第19週 |
06/26 |
Project Presentation (Final report due) |
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